Translation of PLC Programs to x86 for Simulation and Verification

PLC programs are written in special languages, variants of the languages defined in the IEC 61131 standard. These programs cannot be directly executed on personal computers (on x86 architecture). To perform simulation of the PLC program or diagnostics during development, either a real PLC or a PLC simulator has to be used. However, these solutions are often inflexible and they do not provide appropriate performance. By generating x86-representations (semantically equivalent programs which can be executed on PCs, e.g. written in C, C++ or Java) of the PLC programs, some of these challenges could be met. PLCverif is a PLC program verification tool developed at CERN which includes a parser for Siemens PLC programs. In this work, we describe a code generator based on this parser of PLCverif. This work explores the possibilities and challenges of generating programs in widely-used general purpose languages from PLC programs, and provides a proof-of-concept code generation implementation. The presented solution demonstrates that code generation may aid the PLC developers by providing simulation, visualisation, automated unit testing and assertion checking with formal verification methods.