Published March 10, 2012 | Version v1
Technical note Open

Evaluation of the Intel Sandy Bridge-EP server processor

Authors/Creators

  • 1. ROR icon European Organization for Nuclear Research

Description

In this paper we report on a set of benchmark results recently obtained by CERN openlab when comparing an 8-core "Sandy Bridge-EP" processor with Intel's previous microarchitecture, the "Westmere-EP". The Intel marketing names for these processors are "Xeon E5-2600 processor series" and "Xeon 5600 processor series", respectively. Both processors are produced in a 32nm process, and both platforms are dual-socket servers. Multiple benchmarks were used to get a good understanding of the performance of the new processor. We used both industry-standard benchmarks, such as SPEC2006, and specific High Energy Physics benchmarks, representing both simulation of physics detectors and data analysis of physics events. Before summarizing the results we must stress the fact that benchmarking of modern processors is a very complex affair. One has to control (at least) the following features: processor frequency, overclocking via Turbo mode, the number of physical cores in use, the use of logical cores via Simultaneous Multi-Threading (SMT), the cache sizes available, the memory configuration installed, as well as the power configuration if throughput per watt is to be measured. Software must also be kept under control and we show that a change of operating system or compiler can lead to different results, as well. We have tried to do a good job of comparing like with like. In summary, we obtained a performance improvement of 9 – 20% per core and 46 – 60% improvement across all cores available. We also found that Turbo mode has been improved. Vectorized applications get an additional performance boost given by the new AVX instructions. We were particularly impressed by the performance/Watt measurements where we obtained a 70% improvement (and even more when we modified the software). Intel has improved the thermal characteristics of the Sandy Bridge substantially and this was reflected in the measurements of idle power, but also in the measurements of a fully loaded system. Computer centers that are power constrained will, without doubt, appreciate the improvements in this important domain. By raising the bar to such a high level, Intel has set high expectations and we are keen to see whether the pace of improvement can be sustained for the 22 nm processors, namely the Ivy Bridge processor planned for 2013 and the Haswell for 2014.

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Additional details

Identifiers

CDS
1434748
CDS Report Number
CERN-IT-Note-2012-005
Aleph number
000721486CER

CERN

Department
IT

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