LDPC codes - new methodologies

Low Density Parity-Check (LDPC) codes have become very popular because of their near Shannon limit performance when decoded using a probabilistic decoding algorithm. This work proposes several methodologies related to LDPC codes, including design of codes based on optimsation algorithms, mapping LDPC decoders onto parallel architectures, and improving performance of state-of-the-art decoders. LDPC codes are random-based codes, defined in terms of parity-check matrices or Tanner graphs. Parameters of Tanner graphs, particularly a degree distribution and cycle occurrence, are crucial for probabilistic iterative decoders. Therefore, algorithms for producing good codes are needed. In this work, an algorithm for producing codes of large girth is proposed and evaluated. This algorithm is further utilsed for genetic optimzation methods accelerated by coarse grained parallelzation. The proposed methods are evaluated using different code lengths and redundancies. The second part of this thesis is devoted to mapping LDPC decoders on parallel systems, which are becoming very popular in modern communications systems. A general method for mapping irregular LDPC codes is proposed and evaluated on GPU platform using OpenCL and CUDA frameworks. The last main part introduces algorithms for improving performance of LDPC codes. Two main methods are proposed, a method based on backtracking codeword estimations and a method based on using several parity-check matrices. The second method, so called Mutational LDPC (MLDPC), utilses several parity-check matrices produced by slight mutations which run in parallel decoders. Information from all decoders is then used to provide the codeword estimation. The MLDPC is further modified using information entropy and so called radius which provide the additional improvement of the Bit Error Rate.