Design and Simulation of Low Power 2 Gbps LVDS Driver

A monolithic active pixel sensor developed in the TowerJazz 180 nm CMOS imaging Sensor process will equip the upgraded ALICE Inner Tracking System after the Long Shutdown 2 in 2019. To limit the material budget, the power consumption of the pixel chip should be below 100 mW/cm2. The pixel sensor chip data is transmitted by a High speed Low Voltage Differential Signaling (LVDS) driver. It is responsible to deliver the signal to the transmission line with high quality (minimum jitter and wide eye diagram opening). The present LVDS driver is one of the most power hungry circuits in the sensor. For this reason a detailed study has been carried out to target a lower power consumption. This report presents the design and simulation of a Low Voltage Differential Signaling (LVDS) driver based on the H-bridge scheme driving a 4 mA current on a 100 Ω termination resistor. Since the 4 mA always flows in one of the two branches, while the other branch is "off", the static power consumption is power is represented by the sum of this 4 mA plus the off-current in the other branch. The total power consumption has been reduced by finding a trade-off between the dynamic and this off-current power. This has been achieved optimizing driver output stage transistor sizes and transistors gate voltage swing. A further optimization has been explored reducing the DC power by using the current reuse technique, lowering the power supply from 1.8 to 1.1 V.